G - Physics – 06 – F
Patent
G - Physics
06
F
G06F 15/173 (2006.01) G06F 15/80 (2006.01)
Patent
CA 2151673
A parallel processing system includes a plurality of processors, a plurality of communication register modules each including a communication register, and an interconnecting network for connecting the plurality of processors and the plurality of communication register modules. The interconnecting network receives and simultaneously transmits first and second accesses from first and second processors of the plurality of processors to first and second communication register modules of the plurality of communication register modules, respectively. Each of the plurality of communication register modules may include a communication register set. The communication register set includes the communication register. The communication register set may include a lock bit. Each of the plurality of communication register modules may include a test and set part.
Ando Noriyuki
Sakurada Keiko
Corporation Nec
Smart & Biggar
LandOfFree
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