Parity for computer system having an array of external...

Details Parity for computer system having an array of external... Parity for computer system having an array of external...

G - Physics

06

F

354/223

G06F 11/10 (2006.01)

Patent

CA 1121060

IMPROVED PARITY FOR COMPUTER SYSTEM HAVING AN ARRAY OF EXTERNAL REGISTERS Abstract of the Disclosure For a computer system having an array of external registers which may be used as a data source or data destination, wherein such system uses an odd parity checking system, and wherein certain of the register position in the external array can be vacant, an im- proved parity checking configuration includes a plu- rality of parity bit latches, one for each location in the external register array. The parity bit latches are set by an initial microprogram load to provide an odd parity bit for each location in the external array of registers which is empty or which may be faulty, disabled or malfunctioning. This assures that when the external array is searched by row, that all of the array locations will provide the appropriate parity check regardless of whether a byte of information exists therein or not. EN979004

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