G - Physics – 01 – N
Patent
G - Physics
01
N
26/112, 356/197,
G01N 15/12 (2006.01)
Patent
CA 1294152
ABSTRACT An improved electronic particle counter is described in which the electrodes and at least part of the signal processing circuitry are integrally formed on the pane in which the orifice is located. The pane is formed from a wafer of sapphire of the grade customarily used in the manufacture of silicon-on-sapphire integrated circuits. A silicon layer is first formed epitaxially on one side of the wafer and integrated circuits are then formed in the silicon layer using conventional photolithographic techniques. illustratively, the integrated circuits provide the same particle counting and particle sizing functions that are available in separate packages with state-of-the-art particle counters. An electrode is formed on the same side of the wafer as the integrated circuit by converting some of the epitaxial silicon to a conductive polysilicon or by depositing a metallic layer; and the electrode is connected to the signal input lead of the integrated circuit. A second electrode is then formed on the opposite surface of the wafer by deposition of a metallic layer. An orifice is formed in each pane in the sapphire by etching or drilling. Finally the wafer is diced so as to separate the individual panes.
535405
Integrated Ionics Inc.
Osler Hoskin & Harcourt Llp
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