Passivating composite for a semiconductor device comprising...

Details Passivating composite for a semiconductor device comprising... Passivating composite for a semiconductor device comprising...

H - Electricity

01

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356/148, 356/178

H01L 27/00 (2006.01) H01L 21/3105 (2006.01) H01L 21/316 (2006.01) H01L 23/29 (2006.01) H01L 23/31 (2006.01) H01L 23/532 (2006.01)

Patent

CA 1125439

Abstract The semiconductor device includes a layer of silicon nitride (Si3N4) beneath a phosphosilicate glass (PSG) layer. The silicon nitride impervious layer prevents the oxidation of underlying, exposed silicon regions during a "flow" step and any "reflow" step. Accordingly, the flow of the PSG layer can be conducted in an atmosphere containing steam, which means that the PSG layer can contain less than about 7% phosphorus by weight. The reduction of the phosphorus content of the PSG layer provides increased reliability for the semiconductor device. The method of manufacturing such a device is also disclosed.

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