Patterning method in the manufacture of miniaturized devices

Details Patterning method in the manufacture of miniaturized devices Patterning method in the manufacture of miniaturized devices

H - Electricity

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356/177

H01L 21/00 (2006.01) H01L 21/263 (2006.01) H01L 21/308 (2006.01)

Patent

CA 1292328

-9- PATTERNING METHOD IN THE MANUFACTURE OF MINIATURIZED DEVICES Abstract When high-vacuum methods are used in the manufacture of miniaturized devices such as, e.g., semiconductor integrated-circuit devices, device layers on a substrate are preferably patterned without breaking of the vacuum. Preferred patterning involves deposition of a semiconductor mask layer, generation of the pattern in the mask layer by ion deflected-beam writing, and transfer of the pattern by dry etching. When the mask layer is an epitaxial layer, further epitaxial layer deposition after patterning may proceed without removal of remaining mask layer material.

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