Peak detecting circuitry and dual threshold circuitry therefor

Details Peak detecting circuitry and dual threshold circuitry therefor Peak detecting circuitry and dual threshold circuitry therefor

G - Physics

01

R

324/59

G01R 19/04 (2006.01) H03K 5/1532 (2006.01)

Patent

CA 1105087

PEAK DETECTING CIRCUITRY AND DUAL THRESHOLD CIRCUITRY THEREFOR Abstract of the Disclosure This peak detecing circuitry avoids false peak indication while using component circuits of smaller dynamic range and lower voltage energizing power supplies than is possible with contemporary circuitry. The electric wave having peaks for which the times of occurrence are desired, is applied between an erecting (non-inverting) input terminal of a differential amplifying circuit and a point of fixed reference potential. A capacitor is connected between the inverting input terminal of the differential amplifier circuit and the reference point. The differential output of the amplifier circuit is applied through individual amplifier circuits to the capacitor for charging and discharging it in accordance with the instantaneous polarity of the electric wave. A unilateral impedor is interposed in the charging circuit in the form of a diode or a transistor for preventing discharge upon reversal of the electric wave slope. Latching and like circuitry is coupled to the detecting circuitry for indicating the detection. An electric connection, preferably including a diode element and/or a resistance element, is arranged between the indicating circuit and the amplifying circuit for dynamically altering the threshold from a high value as the peak of the wave containing noise is approached to a relatively low value as the peak of the wave containing timing information is approached. SA9-77-039 -1-

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