Peripheral control circuitry for personal computer

Details Peripheral control circuitry for personal computer Peripheral control circuitry for personal computer

G - Physics

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354/230.82

G06F 3/00 (2006.01) G06F 3/06 (2006.01) G06F 3/16 (2006.01) G06F 9/00 (2006.01) G06F 13/00 (2006.01) G06F 13/14 (2006.01) G06F 13/32 (2006.01) G06F 13/38 (2006.01) G06F 13/40 (2006.01)

Patent

CA 1273709

Abstract: A peripheral control circuit that can be incorpo- rated into a personal computer system and is compatible with address bus and data bus architecture, has direct memory access (DMA) where priority is established for bus access. The operating parameters of the circuit are resettable by and from a system microprocessor and from memory via the bus architecture. A custom NMOS 48 pin chip is provided capable of interfacing with the data bus architecture and address bus architecture of a host computer system which extensively uses direct memory access (DMA). In- dependent control and interface circuits are provided for each of right and left audio channels, an information storage medium such as a floppy disk, a communication port (UART), and up to four joy stick or paddle (pot) ports. Each independent control and interface circuit is loaded with data from a data bus connection according to instructions placed at that data's destination. A separate interrupt priority control and status circuit is dedicated to communication with a microprocessor in the host computer system. This microprocessor communication circuit is connected with each of the right and left audio channel circuits, the disk circuit, and the UART circuit. A separate logic circuit communicates DMA requests from the audio and disk circuits to the host system.

542370

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