Peripheral controller and adapter interface

Details Peripheral controller and adapter interface Peripheral controller and adapter interface

G - Physics

06

F

354/236

G06F 13/28 (2006.01)

Patent

CA 1311310

PERIPHERAL CONTROLLER AND ADAPTER INTERFACE ABSTRACT OF THE DISCLOSURE In a computer system, each of several peri- pheral devices communicates through an associated adapter with a controller. The controller sequentially establishes direct memory access data transfers between main memory on a system bus and individual peripheral devices. A sequencer establishes individual cycle times during which each adapter and an associated direct memory access controller is able to complete a DMA transfer. The adapter is conditioned for DMA and other data transfers by control signals from the controller. A demand signal is asserted by the adapter only when the buffer memory of the adapter is prepared to service the DMA transfer. The sequencer responds to the demand signal to generate a request for a DMA transfer during which a predetermined, limited amount of data is transferred in a DMA operation. During start-up, the adapter responds to initial control signals to provide an identifier to the controller so that the controller is able to fetch the software required to communicate with the adapter.

568402

Affiliated with

Also associated with

Rating

Peripheral controller and adapter interface does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Peripheral controller and adapter interface, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Peripheral controller and adapter interface will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1302289