Phase adjustment system

Details Phase adjustment system Phase adjustment system

H - Electricity

04

J

328/88

H04J 3/06 (2006.01) G06F 1/12 (2006.01) H03K 5/135 (2006.01) H03K 21/40 (2006.01) H04L 7/00 (2006.01)

Patent

CA 1252157

PHASE ADJUSTMENT SYSTEM Abstract Synchronization facilities are disclosed for maintaining error free timing of a digital system when control of the system timing is switched between a plurality of clock sources. The signal of each source is applied to an associated counter divider whose output is applied to switch facilities which extend the output of only one divider at a time as a reference clock source to the digital system. The dividers for the other sources are forcibly reset each time the divider of the reference source advances from its all is to its reset (all Os) position. This maintains the output signals of all dividers in phase with each other to prevent disturbances to the digital system when its timing is switched between clock sources.

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