Phase-control loop

Details Phase-control loop Phase-control loop

H - Electricity

03

L

331/32

H03L 7/08 (2006.01) H03L 7/081 (2006.01)

Patent

CA 1264828

ABSTRACT: "Phase-control loop". In digital systems clock signals are generated from an external clock reference signal for the purpose of synchronization with the aid of a phase-control loop 1 incorporating a frequency-controllable oscillator 2. In practice synchronization problems occur due to the phase inaccuracy of these clock signals relative to the clock reference. By a two-level control of the oscillator fre- quency in a plurality of cycles, located within a period of the clock reference signal, using a pulse-width modulator 12, the phase accuracy of a clock signal to be derived from the oscillator output signal is improved. In a preferred embodiment the loop 1 comprises: storage means 16, control means 17 and selection means 18 for providing in accordance with a given phase control strategy a phase-accurate oscillator output signal, this accuracy already being obtained on a small time scale.

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