Phase inversion synchronization

Details Phase inversion synchronization Phase inversion synchronization

H - Electricity

04

J

363/17

H04J 3/06 (2006.01) H04L 7/06 (2006.01)

Patent

CA 1044386

PHASE INVERSION SYNCHRONIZATION ABSTRACT OF THE DISCLOSURE A frame delineating bit, in a stream of data bits from different sources in a time division multiplex system, is defined by causing a transition between states representing one and zero at a time which is 180° out of phase with nor- mal data transition times, only in the case where adjacent data bits of the highest order channel and the lowest order channel have different data delineating states, thereby avoiding any increase in bandwidth to accommodate the framing bit. -1-

219511

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