Phase-locked circuit and frequency multiplier obtained

Details Phase-locked circuit and frequency multiplier obtained Phase-locked circuit and frequency multiplier obtained

H - Electricity

03

L

H03L 7/081 (2006.01) H03B 19/00 (2006.01) H03B 19/14 (2006.01) H03K 5/00 (2006.01) H03L 7/089 (2006.01) H03L 7/16 (2006.01)

Patent

CA 2051121

The frequency multiplier (20) consists of a phase-locked circuit having a phase comparator (11) for the control of a plurality of lag elements (130-137) supplying successively shifted phase signals (CL0-CL7) to a logical adder (16) made of exclusive OR gates.

Le multiplieur de fréquence (20) est formé d'un circuit verrouillé en phase comprenant un com- parateur de phase (11) pour la commande d'une pluralité d'éléments de re- tard (130-137) fournissant des signaux successivement décalés en phase CL0-CL7 à un additionneur logique (16) fait de porte OU Exclusif.

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