Phase locked loop circuit

Details Phase locked loop circuit Phase locked loop circuit

H - Electricity

03

L

328/28, 331/40

H03L 7/00 (2006.01) H03L 7/08 (2006.01) H04N 5/12 (2006.01)

Patent

CA 1057368

PHASE LOCKED LOOP CIRCUIT ABSTRACT OF THE DISCLOSURE Phase locked loop (PLL) circuit comprises, a phase detector including first and second cascade- connected differential pairs of transistors constituting an analog multiplier with each one of the differential pair transistors supplied with two inputs, a low pass filter for converting the detection output into a D.C. control voltage, and an emitter-coupled multivibrator including constant current sources for determining the oscillation frequency with a timing capacitor. The PLL circuit is provided with constant current adjusting means for variably setting or determining the current through a constant current source connected to the second dif- ferential pair of transistors and the currents through the current sources determining the oscillation frequency in a correlated manner through a common variable resistor. Thereby, dispersions in the loop gain of the PLL circuit are reduced.

271850

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