Phase-locked loop synthesizer for use in tdm communications...

Details Phase-locked loop synthesizer for use in tdm communications... Phase-locked loop synthesizer for use in tdm communications...

H - Electricity

03

L

H03L 7/18 (2006.01) H03L 7/14 (2006.01)

Patent

CA 2061194

An analog switch is provided in a phase-locked loop (PLL) synthesizer using direct digital synthesizer (DDS) circuitry, for opening a PLL. The PLL is closed to make operative the DDS circuitry and a fixed frequency divider within an idle time slot of each time-division multiplexing (TDM) frame. For the rest of the frame, the voltage- controlled oscillator within the PLL is held in a "hold state".

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