H - Electricity – 03 – L
Patent
H - Electricity
03
L
H03L 7/18 (2006.01)
Patent
CA 2313132
A channelizing oscillator (10, 110, 130, 150) includes a phase-locking oscillator (12) whose output frequency is channelized in a conventional manner by a dual-modulus divider (18), and both a modulus controller (38) and counters associated with A and N inputs of an integrated chip (20). Secondary channelizers (46, 112, and 154) are provided that channelize the output frequency in smaller frequency increments than those provided by the phase- locking oscillator (12). By channelizing in two places by two different sizes of frequency increments, a bandwidth can be channelized in smaller frequency increments. By mixing the channelized frequencies in quadrature, channelized frequencies are produced in which periods of the new wave are essentially constant, filtration requirements are minimized, the compare rate is maximized, and the phase-locking speed is maximized. In preferred embodiments, the quadrature mixers (58 and 142) include means (96) for selective amplitude matching of in-phase and quadrature-phase components. In various embodiments, the secondary channelizers (46, 112, and 154) include a secondary phase-locking oscillator (48) that is channelized, or a direct digital synthesizer (114) and D/A converters (116A and 116B), cascaded binary-rate multipliers (160A, 160B,'and 160N), or cascaded digital-rate multipliers (160A, 160B, and 160N).
Emhiser Research Limited
Smart & Biggar
LandOfFree
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