G - Physics – 01 – R
Patent
G - Physics
01
R
356/118
G01R 31/26 (2006.01) G01R 31/308 (2006.01) H01L 21/66 (2006.01)
Patent
CA 1236929
ABSTRACT OF THE DISCLOSURE PHOTON ASSISTED TUNNELING TESTING OF PASSIVATED INTEGRATED CIRCUITS Covering metal test pads of a passivated integrated circuit process intermediate wafer or completed integrated circuit chip-to-test, with a thin conductive overlayer, and then accessing the test pads through the passivation layer and conductive overlayer, by a pulsed laser to provide voltage-modulated photon-assisted tunneling through the insu- lation layer, to the conductive overlayer as an electron current, and detecting the resulting electron current, provides a nondestructive test of integrated circuits. The passivation, normally present to protect the integrated circuit, also lowers the threshold for photoelectron emission. The conductive overlayer acts as a photoelectron collector for the detector. A chip-to-test which is properly designed for photon assisted tunneling testing has test sites accessible to laser photons even though passivated. Such a chip-to-test may be nondestructively tested in air at one or several stages of its processing, without the sacrifices of mechanical probing or of bringing test sites out to output pads. The conductive overlayer may be removed after tests have been completed. Integrated circuit process interme- diate chips may be specially designed for testability, with test sites grouped for easy access through windows left uncovered by subsequent layers.
499662
Beha Johannes G.
Dreyfus Russell W.
Hartstein Allan M.
Rubloff Gary W.
International Business Machines Corporation
Rosen Arnold
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