Pixel interpolation circuitry as for a video signal processor

Details Pixel interpolation circuitry as for a video signal processor Pixel interpolation circuitry as for a video signal processor

H - Electricity

04

N

350/33

H04N 9/80 (2006.01) G06F 17/17 (2006.01) H04N 7/46 (2006.01)

Patent

CA 1319420

RCA 81,636 Abstract of the Disclosure A processor for expanding a compressed video signal includes a pixel interpolator which interpolates between input pixel values in two dimensions. This interpolator calculates and stores intermediate pixel values which are interpolated in the vertical direction. pair of these intermediate pixel values are then fed back into the interpolator which performs a horizontal interpolation to produce pixel values that are interpolated in both the horizontal and vertical dimensions. In steady state operation, the horizontal and vertical interpolation operations are alternated to produce a stream of two-dimensionally interpolated values.

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