Placement of memory mapped registers at consecutive addresses

Details Placement of memory mapped registers at consecutive addresses Placement of memory mapped registers at consecutive addresses

G - Physics

06

F

G06F 13/16 (2006.01)

Patent

CA 2140958

A method of moving data into a peripheral system of a computer from a CPU comprised of connecting a port of a memory mapped register of the system to a memory bus of the computer, connecting a port of a CPU to an I/O bus to which at least one peripheral is connected, and connecting a memory access port of the CPU to the memory bus, memory mapping a register of the CPU to multiple consecutive addresses, and applying a repetitive memory data move command to the processor to transfer data into the register of the system through the port of the register of the system via the memory bus from the register of the CPU.

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