H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/7
H01L 21/70 (2006.01) H01L 21/768 (2006.01)
Patent
CA 1055616
ABSTRACT A method using a chemically vapor deposited (CVD) insulator to form a substantially planar layer of insulative material atop a conductive pattern on the surface of a substrate. The invention also features the use of a photoresist both as a mask for forming apertures in an underlying insulating layer as well as a lift-off material for a subsequently deposited conductive layer. In the method, a first insulating layer is deposited atop the substrate. Photoresist is then deposited; the resist pattern is exposed and developed; and the insulator is etched to expose selected areas of the substrate. A conductive film, preferably metal, is then deposited in blanket fashion in such quantity as to achieve the same height as the first insulator within the exposed apertures. The resist is lifted off, thereby leaving metal in the exposed apertures only. The pattern at this point consists of a single level of a conductive pattern and the insulator pattern with gaps between the conductors and the insulator. The gaps are the result of the unavoidable removal of a portion of the insulator below the photoresist during the etching process. Another insulating film is chemically vapor deposited (pyrolytically deposited) in blanket fashion. Notwithstanding the gaps between the conductors and first insulator, the second film is substantially planar if the thickness of this second insulating film equals or exceeds one-half the width of the largest of said gaps. The method is applicable to any level of conductive patterns (metallization) atop the substrate.
268532
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