Pll frequency synthesizer

H - Electricity – 03 – L

Patent

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Details

H03L 7/181 (2006.01) H03L 7/08 (2006.01) H03L 7/087 (2006.01) H03L 7/199 (2006.01)

Patent

CA 2053657

A PLL frequency synthesizer includes a reset circuit which determines whether or not an oscillator starts to normally generate an oscillation signal in response to a power save signal which intermittently operates the oscillator in a standby mode and which outputs a reset signal to a prescaler when it is determined that the oscillator normally generates the oscillation signal. A hold circuit prevents a frequency-divided signal from the prescaler to a programmable counter and an initial phase detection circuit until the prescaler is reset to an initial state in response to the reset signal and starts to normally generate the frequency-divided signal.

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