Pll synthesizer

H - Electricity – 03 – B

Patent

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331/10

H03B 21/02 (2006.01) H03L 7/185 (2006.01) H04B 1/40 (2006.01)

Patent

CA 1091310

PLL SYNTHESIZER ABSTRACT OF THE DISCLOSURE A PLL synthesizer having a mixer comprised of a D-flip-flop, wherein a reference signal fo is set to be fo = (2n + 1) fr (where n is a positive integer and fr is a frequency difference between adjacent channels), and a signal obtained by dividing the frequency of the reference signal fo by a factor of (2n + 1) is used as a reference signal for phase comparison and a signal obtained by dividing the frequency of the reference signal fo by a factor of 2 is used as a clock input to the D-flip-flop, and thereby the circuit configuration is simplified and the stability is enhanced.

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