Point of sale payment terminal

G - Physics – 07 – G

Patent

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Details

G07G 1/12 (2006.01) G06Q 20/00 (2006.01) G06Q 30/00 (2006.01) G07F 7/04 (2006.01) G07F 7/10 (2006.01)

Patent

CA 2381680

An integrated point of sale terminal for processing multiple payment memory. The housing (12) has a base shaped to sit on a merchant counter and has a document slot for receiving a check. The processor is disposed in the housing (12), and the memory is in communication with the processor. The payment terminal (10) is located at the point of sale during use to allow a store merchant to accept multiple payment types. The payment terminal (10) further includes a magnetic ink character recognition device for reading a string of magnetic ink characters on the check which is affixed to the housing (12) at the document slot and is in communication with the processor. Further, the payment terminal (10) includes an imaging device (20) for capturing an image of the check. The imaging device (20) is affixed to the housing (12) at the document slot and is in communication with the processor.

La présente invention concerne un terminal intégré pour point de vente permettant de traiter une mémoire de multiples paiements. Le boîtier (12) possède une base formée pour pouvoir être posée sur le comptoir d'un commerce, et une fente prévue pour recevoir les chèques. Le processeur est situé dans le boîtier (12), et la mémoire communique avec ce processeur. Ce terminal de paiement (10) est localisé sur le point de vente en cours d'utilisation de façon à permettre à un commerçant d'accepter de multiples types de paiement. Ce terminal de paiement (10) comprend aussi un dispositif de reconnaissance de caractère à l'encre magnétique permettant de lire une chaîne de caractères à l'encre magnétique sur le chèque. Ce dispositif est fixé au boîtier au niveau de la fente et il communique avec le processeur. En outre, ce terminal de paiement (10) comprend un dispositif d'imagerie permettant de capturer une image sur le chèque. Ce dispositif d'imagerie (20) est fixé au boîtier (12) au niveau de la fente et il communique avec le processeur.

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