Power/ground metallization routing in a semiconductor device

Details Power/ground metallization routing in a semiconductor device Power/ground metallization routing in a semiconductor device

H - Electricity

01

L

H01L 27/118 (2006.01) H01L 27/02 (2006.01)

Patent

CA 2279182

A semiconductor device and a method of laying out the same includes routing primary power and ground distributions in the second metallization layer, rather than the first metallization as is conventionally done. This improves routability in the first metallization layer while providing sufficient current handling ability in the power and ground distributions.

L'invention concerne un dispositif à semiconducteur et un procédé de tracé dudit dispositif, consistant à acheminer les distributions primaires d'alimentation et de masse dans la seconde couche de métallisation, plutôt que dans la première métallisation, comme dans le mode de fabrication classique. Ledit procédé améliore la capacité d'acheminement de la première couche de métallisation tout en fournissant une capacité de gestion du courant suffisante dans les distributions d'alimentation et de masse.

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