Power-up/power-down detection circuit

Details Power-up/power-down detection circuit Power-up/power-down detection circuit

G - Physics

01

R

G01R 19/165 (2006.01) H03K 17/22 (2006.01)

Patent

CA 2230681

A power-up detector for detecting power-up and power supply voltage bump conditions comprising a current mirror connected to a power supply, a pair of series connected resistors connected between the current mirror and ground, and providing a bias point at a junction of the series connected resistors, and a field effect transistor having a source-drain circuit connected between the current mirror and ground for providing an output signal, the transistor being controlled by the bias point.

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