Preparation of indium phosphide semiconductor devices

Details Preparation of indium phosphide semiconductor devices Preparation of indium phosphide semiconductor devices

H - Electricity

01

L

356/181, 345/33

H01L 21/205 (2006.01) H01L 21/324 (2006.01) H01L 33/00 (2006.01)

Patent

CA 1297211

ABSTRACT It has been found that layers which include arsenic and/or zinc can have an adverse effect upon optoelectronic semiconductor devices such as lasers. This is reduced by treatments in which arsenic and zinc are excluded. Preferably the substrate is cooled from reaction temperature in the presence of a mixture of hydrogen and PH3 (replacing AsH3 and/or Zn(CH3)2 used to grow the final layer). Alternatively, devices having a contact layer of heavily p-type gallium indium arsenide are improved by the deposition of a protective layer of indium phosphide. This layer is removed immediately before metalisation. Even though the protective layer is not present in the final product it has a beneficial effect.

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