Presettable dynamic delay flip-flop circuit

H - Electricity – 03 – K

Patent

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328/92

H03K 17/20 (2006.01) H03K 3/037 (2006.01) H03K 23/66 (2006.01)

Patent

CA 1085002

Abstract of the Disclosure A presettable dynamic delay flip-flop circuit including two first and second series-connected ? bit delay circuits, a gate circuit for supplying these delay circuits with a control signal for controlling their operation, and a switching circuit for supplying the second delay circuit with preset data capable of freely presetting the voltage level of an output signal from said flip-flop circuit. The delay circuits and switching circuit are respectively formed of clocked inverters. The flip-flop circuit is formed of a small number of elements and operated at high frequency.

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