H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/154, 356/166
H01L 21/76 (2006.01) H01L 21/306 (2006.01) H01L 21/316 (2006.01) H01L 21/762 (2006.01) H01L 23/535 (2006.01) H01L 27/12 (2006.01)
Patent
CA 1068011
PROCESS FOR FABRICATING DEVICES HAVING DIELECTRIC ISOLATION AND STRUCTURE. Abstract of the Disclosure A process for forming complete dielectrically isolated monocrystalline silicon regions on a substrate by depositing a first epitaxial silicon layer embodying an N-type impurity on a low resistivity silicon substrate embodying a P-type impurity, forming annular P-type impurity regions in the first epitaxial layer, depositing the second epitaxial layer embodying an N-type impurity on the first epitaxial layer, forming annular P-type impurity regions in the second epitaxial layer in registry with the annular regions in the first epitaxial layer, converting the silicon substrate and the annular P-type regions in the first and second epitaxial layers into porous silicon material by an anodic treatment carried out in an aqueous solution of hydrofluoric acid, and oxidizing the porous silicon material to form silicon oxide. A semiconductor structure having a backing substrate of silicon oxide with monocrystalline silicon islands embedded therein. A preferred embodiment includes low resistivity regions that extend through the substrate.
250133
Magdo Ingrid E.
Magdo Steven
Nestork William J.
International Business Machines Corporation
Na
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