Process for fabricating intrinsic layer and applications

Details Process for fabricating intrinsic layer and applications Process for fabricating intrinsic layer and applications

H - Electricity

01

L

H01L 21/208 (2006.01) H01L 31/111 (2006.01) H01L 31/117 (2006.01)

Patent

CA 2136343

2136343 9324954 PCTABS00028 A method of forming a gallium arsenide p-i-n structure, which includes heating to dissolve gallium arsenide in a solvent such as bismuth or gallium to form a saturated solution of gallium arsenide in the solvent (22), contacting the solution with a gaseous mixture, which mixture includes hydrogen, water vapor and products of reactions between the hydrogen and the water vapor with the solvent and with silicon dioxide, to form a contacted solution, coating a suitably selected substrate (14), such as a group III-V compound such as gallium arsenide, with the contacted solution, cooling the coated substrate to precipitate gallium arsenide from the contacted solution onto the substrate, and removing the substrate coated with a layer of gallium arsenide having a p-i-n structure which constitutes the product.

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