Process for fabricating self-aligned high performance...

Details Process for fabricating self-aligned high performance... Process for fabricating self-aligned high performance...

H - Electricity

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L

356/37

H01L 21/265 (2006.01) H01L 29/74 (2006.01)

Patent

CA 1307354

PROCESS FOR FABRICATING SELF-ALIGNED HIGH PERFORMANCE LATERAL ACTION SILICON-CONTROLLED RECTIFIER AND STATIC RANDOM ACCESS MEMORY CELLS ABSTRACT OF THE DISCLOSURE A process is described for fabricating a self-aligned lateral silicon-controlled rectifier circuit which includes the steps of forming an insulat- ing layer 18 on a semiconductor substrate which includes an upper N-type region 12, 15 and a lower P-type region 10, and then forming an impurity mask 21 on the insulat- ing layer 18. Portions of the insulating layer 18 adjacent the impurity mask 21 are then removed, and P conductivity type impurity 33 is introduced into the substrate 15 except where it is protected by the impurity mask 21. Finally, N-type impurity is intro- duced, also adjacent the impurity mask 21. Then the structure is annealed, the impurity is diffused par- tially beneath the impurity mask to create a lateral SCR structure having a narrow PNP base width.

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