H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/149
H01L 21/36 (2006.01) H01L 21/033 (2006.01) H01L 21/225 (2006.01) H01L 21/318 (2006.01) H01L 29/78 (2006.01)
Patent
CA 1223975
ABSTRACT OF THE INVENTION A process for manufacturing a high voltage DMOS (Deep Diffusion Metal Oxide Semiconductor) transistor includes a first ion implantation and driven step to form a P-well in a N-substrate, and a second such step to form a N+ region in this well and a channel between this region and the substrate and under a polysilicon gate which is covered with a silicon nitride layer during the first step. By the presence of the latter layer pitting of the gate is prevented and no leakage paths are formed between source and drain.
456985
International Standard Electric Corporation
Smart & Biggar
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