Process for making self-aligning thin film transistors

Details Process for making self-aligning thin film transistors Process for making self-aligning thin film transistors

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H01L 21/84 (2006.01) H01L 21/027 (2006.01) H01L 21/336 (2006.01) H01L 29/423 (2006.01) H01L 29/49 (2006.01) H01L 29/78 (2006.01)

Patent

CA 1278883

Abstract of the Invention PROCESS FOR MAKING SELF-ALIGNING THIN FILM TRANSISTORS A process for making a self-aligned thin film transistor, said process comprising the steps of: (1) providing a gate which comprises a glass substrate, a transparent electrode on top thereof, and a metal electrode on top of said transparent electrode, (2) forming a stack by depositing over said gate a triple layer structure consisting of gate dielectric material, active material and a top passivating dielectric, (3) coating the top of said triple layer with a dual-tone photoresist, (4) exposing said photoresist from the top through a mask having transparent areas, opaque areas and areas transparent to selective wavelengths, using broad band UV light, (5) developing the photoresist by treatment with a solvent, (6) etching the stack with a liquid etchant through to the glass substrate, (7) exposing the photoresist from the bottom through the glass substrate using near UV light, (8) developing the photoresist with a solvent, and (9) etching off the top passivating layer of the stack.

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