Process for manufacturing semiconductor bicmos devices

H - Electricity – 01 – L

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H01L 21/82 (2006.01) H01L 21/225 (2006.01) H01L 21/3215 (2006.01) H01L 21/8249 (2006.01) H01L 27/06 (2006.01)

Patent

CA 1273128

- 1 - Abstract: The present invention relates to a process for forming field effect transistors and bipolar transistors in a semiconductor wafer. The method is comprised of the steps of creating layers of appropriately doped polycrystalline silicon material over areas of the semiconductor wafer that are to become source and drain regions of the field effect transistors and emitter regions of the bipolar transistors, and heating the semiconductor wafer. The heating is carried out such that the dopants from the polycrystalline silicon layers are diffused into the semiconductor wafer thereby simultaneously forming the source and drain regions of the field effect transistors and the emitter regions of the bipolar transistors.

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