Process for production of integrated mos circuits with and...

Details Process for production of integrated mos circuits with and... Process for production of integrated mos circuits with and...

H - Electricity

01

L

356/132, 356/134

H01L 21/28 (2006.01) H01L 21/033 (2006.01) H01L 21/265 (2006.01) H01L 21/8234 (2006.01)

Patent

CA 1141868

ABSTRACT OF THE DISCLOSURE Integrate MOS circuits with and without MNOS transistors in silicon-gate technology are produced with overlapped contacts using a silicon nitride mask. After production of structured SiO2 layer on a p- or n- doped semiconductor substrate to separate active transistor zones in accordance with the so-called LOCOS process, a silicon nitride layer is deposited onto the surface and is then structured so that the zones in which a gate oxide is to be produced, are uncovered and during gate oxidation, the surface of this structured silicon nitride layer is converted into an oxynitride layer. In contrast to previously known processes, the invention provides self-aligned overlapped contacts with oversized contact holes. The silicon-nitride layer functions as an etch-stop during etching of an intermediate oxide. This avoids under-etching of the polysilicon during contact hole etching. The overlapped contacts allow a substantial increase in the packing and integra- tion density of the so-produced circuits.

353871

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