Process for the production of a multi-chip wiring arrangement

Details Process for the production of a multi-chip wiring arrangement Process for the production of a multi-chip wiring arrangement

H - Electricity

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347/35, 356/6

H05K 3/06 (2006.01) H01L 23/538 (2006.01) H05K 1/11 (2006.01) H05K 3/10 (2006.01) H05K 3/34 (2006.01) H05K 3/40 (2006.01) H05K 3/42 (2006.01) H05K 1/03 (2006.01) H05K 3/24 (2006.01) H05K 3/38 (2006.01) H05K 3/46 (2006.01)

Patent

CA 1041207

Abstract A process for producing multi-chip wiring arrangements which consist of a ceramic carrier with through contact holes associated with thin film wiring on one side of the carrier and with multi-layer, thick-layer wiring on the other side of the carrier. The holes on the one side of the carrier are metallized and galvanically strengthened while the holes on the other side of the carrier are sealed by baking therein a thick layer of paste. Thereafter the multi layer, thick layer wiring and the thin film wiring are produced in that order.

235058

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