Process of forming electrical connections between conductive...

H - Electricity – 05 – K

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H05K 3/12 (2006.01) H01L 21/607 (2006.01) H01L 23/522 (2006.01) H05K 3/46 (2006.01) H05K 1/00 (2006.01) H05K 1/09 (2006.01) H05K 3/40 (2006.01)

Patent

CA 2077720

The process of the present invention allows inter- connecting one conductive layer to another in a Multichip Module. The process uses bumps formed by wire bonding, or any other means of forming bumps of .002"-.004" height with comparable diameter. These bumps create an opening through dielectric insulating layers, thereby allowing one conductive layer to be electrically connected to the next conductive layer.

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