Process of ion implant masking in cmos manufacture and...

Details Process of ion implant masking in cmos manufacture and... Process of ion implant masking in cmos manufacture and...

H - Electricity

01

L

356/149, 204/96.

H01L 29/76 (2006.01) H01L 21/265 (2006.01) H01L 21/8238 (2006.01)

Patent

CA 1194614

ABSTRACT A method of fabricating a CMOS device is provided for pattern- ing the gates and protecting them during ion implantation. A metal layer (20) is sandwiched between the gate material layer (18) and the photo- resist layer (22) that is used as a pattern mask for the gate material during etching. The photoresist pattern (22) masks the metal as it is etched, and the metal pattern (20M) masks the gate material as it is etched to form a gate pattern. The metal mask is left over the gates to serve as an ion implant stop mask. Two photoresist patterns are successively formed to cover the devices of one conductivity type while the opposite type device source and drain regions are implanted. During ion implantation,the metal mask substantially prevents the ions from reaching the gate portions. Then, the metal mask may be easily stripped without causing damage.

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