Process of making dual well cmos semiconductor structure...

Details Process of making dual well cmos semiconductor structure... Process of making dual well cmos semiconductor structure...

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H01L 21/76 (2006.01) H01L 21/033 (2006.01) H01L 21/762 (2006.01) H01L 21/8238 (2006.01) H01L 29/06 (2006.01) H01L 27/092 (2006.01)

Patent

CA 1209280

PROCESS OF MAKING DUAL WELL CMOS SEMICONDUCTOR STRUCTURE WITH ALIGNED FIELD-DOPINGS USING SINGLE MASKING STEP ABSTRACT OF THE DISCLOSURE A process for making a CMOS dual-well semi- conductor structure with field isolation doping, wherein only a single lithographic masking step is required for providing self-alignment both of the wells to each other and also of the field isolation doping regions to the wells. The lithographic masking step forms a well mask and defines an oxidation barrier which acts as: an implant mask (absorber) during the ion-implantation of a field dopant of one type; an oxidation barrier over one well during the oxidation of the opposite-type well to form over the one well a sacrificial oxide layer which forms the alignment marks for subsequent formation of the field-doping regions; and a dopant-transmitter during the ion-implanation of an opposite-type field dopant which is simultaneously absorbed by the sacrificial oxide. As a result, there are formed field-doped oxide layers self-aligned to the wells so that, with a subsequent masking step, oxide field isolations are defined over the doped oxide layers. A heat cycle is then used to drive the field dopants into the cor- responding field-doping regions.

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