Programmable array logic circuit

H - Electricity – 03 – K

Patent

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328/129

H03K 19/20 (2006.01)

Patent

CA 1139375

ABSTRACT OF THE DISCLOSURE The specification describes a programmable integrated logic circuit array which comprises a plurality of AND gates, each AND gate having a plurality of inputs and an output, and a plurality of OR gates. The circuit array includes a program- mable matrix which comprises a plurality of input lines for the inputs to the AND gates and non-programmable connections between the outputs of sub-pluralities of the AND gates and predetermined and select individual one of the OR gates. The array also includes a register, connected to the output of at least one of the logical OR gates for storing the logical state of the OR gate to which it is connected, gating circuits con- nected to the output of at least one of the OR gates, feedback circuits for connecting the output of each gating circuit to selected ones of the input lines, and an arrangement for gating each of the gating circuits to either disable or enable the OR gate.

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