Programmable array logic circuit

H - Electricity – 03 – K

Patent

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328/129

H03K 19/20 (2006.01)

Patent

CA 1144608

ABSTRACT OF THE DISCLOSURE The specification describes a programmable array of integrated logic circuitry which comprises a plurality of AND gates, a plurality of OR gates, a programmable matrix comprising a plurality of input lines and inputs to the AND gates, non-programmable electrical connections between the outputs of sub-pluralities of the AND gates and predetermined and select individual ones of the OR gates, a gating circuit connected to the output of at least one of the OR gates, a feedback circuit for connecting the outputs of each gating circuit to selected ones of the input lines and an arrangement for gating each of the gating circuits to either disable or enable the OR gate.

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