Programmable continuous phase modulation (cpm) decoder and...

H - Electricity – 03 – M

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H03M 13/00 (2006.01) H04L 1/00 (2006.01) H04L 27/18 (2006.01)

Patent

CA 2663290

The programmable decoder, such as a Maximum Likelihood Sequence Estimation (MLSE) decoder (e.g., a Viterbi decoder) may include a programming input for a plurality of programmable trellis parameters, and a programmable device, such as an FPGA, connected to the programming input and implementing a continuous phase modulation (CPM) decoder including at least one trellis structure defined based upon the plurality of programmable trellis parameters. The plurality of programmable trellis parameters may include a number of trellis structures, a number of trellis states for each trellis structure, and a number of branches for each trellis state. Also, the trellis structure may include a reverse-state trellis structure.

L'invention concerne un décodeur programmable, comme un décodeur à estimation de séquence de probabilité maximale (MLSE) (par exemple un décodeur Viterbi). Ledit décodeur programmable peut comporter une entrée de programmation pour une pluralité de paramètres de treillis programmables; et un dispositif programmable, comme un FPGA, connecté à l'entrée de programmation et permettant de réaliser un décodeur de modulation de phase continue (CPM) comportant au moins une structure de treillis définie en fonction de ladite pluralité de paramètres de treillis programmables. La pluralité de paramètres de treillis programmables peut comporter un certain nombre de structures de treillis, un certain nombre d'états de treillis pour chaque structure de treillis, et un certain nombre de branches pour chaque état de treillis. La structure de treillis peut, en outre, comporter une structure de treillis état inverse.

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