Programmable frequency divider

Details Programmable frequency divider Programmable frequency divider

H - Electricity

03

K

328/64

H03K 21/00 (2006.01) H03K 23/66 (2006.01)

Patent

CA 1127246

Abstract of the Disclosure A programmable frequency divider includes a programmable counter which comprises flip-flops of a number less by one than the number of bits in a program value. The divider has first and second control circuits which respectively control every half period of a preset divided output pulse alternately, the second control circuit acting to delay the moment of the control in response to the least significant bit having a selected logic level, thereby enabling one to reduce the clock pulse frequency to a half in comparison with a conventional one. One can also obtain an optional sub-output signal of twice or one-half the frequency of a preset frequency output signal.

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