Programmable frequency dividing apparatus

Details Programmable frequency dividing apparatus Programmable frequency dividing apparatus

H - Electricity

03

K

H03K 23/66 (2006.01)

Patent

CA 2049225

A programmable frequency dividing apparatus comprises a programmable frequency dividing network which has a plurality of cascade-connected programmable frequency dividing staged. Each stage divides a frequency of an input clock pulse by two or three based on a logic level of a preset input signal supplied thereto for changing a division ratio. Circuits are provided for incrementing a division ratio of the programmable frequency dividing network by +1. The circuit for incrementing comprises gates for detecting whether or not each of the outputs of programmable frequency dividing stages of a programmable frequency dividing network, subsequent to a second stage of the programmable frequency dividing network, assumes a predetermined pattern. The circuit also sets a preset input signal applied to a first stage of the programmable frequency dividing network to a change- over level for causing the first stage of the programmable frequency dividing network to divide the frequency of the clock pulse by three when an instruction signal for incrementing a division ration by +1 is inputted to the gates.

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