Programmable logic device

Details Programmable logic device Programmable logic device

H - Electricity

03

K

H03K 19/177 (2006.01) H03K 17/693 (2006.01) H03K 19/0185 (2006.01) H03K 19/173 (2006.01)

Patent

CA 2046280

ABSTRACT In selectors 210 - 213 two pull-up switching elements 40 - 403, 420 - 423, the elements being connected in series to each other in each selector, are additionally Provided instead of a don't care-setting two-input NAND gate, for connecting or disconnecting connection lines of outputs of positive logic switching elements 240 - 243 and those of negative logic switching elements 230 - 233 with or from a power supply line Vdd. First memory cells M00 - M30 control on-off states of negative logic switching elements 230 - 233 and ones 400 - 403 of pull-up switching elements, and second memory cells M01 - W31 control on-off states of positive logic switching elements 240 - 243 and -the others 421 - 423 of the pull-up switching elements. Thus, use of a prior art two-input NAND gate is eliminated and hence the number of transistors is reduced. - 30 -

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