Programmable logic device with decryption algorithm and...

G - Physics – 06 – F

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G06F 21/02 (2006.01)

Patent

CA 2428031

To prevent copying of a design implemented in a programmable logic device (PLD), the PLD itself stores a decryption key or keys loaded by the designer, and includes a decryptor for decrypting an encrypted configuration bitstream as it is loaded into the PLD. The PLD also includes logic for reading header information that indicates whether the bitstream is encrypted, and can accept both encrypted and unencrypted bitstreams. The encryption keys may be stored in non-volatile memory or backed up with a battery so that they are retained when power is removed.

L'invention concerne un procédé permettant d'empêcher de copier une conception implantée dans une unité logique programmable (ULP), selon lequel l'ULP elle-même stocke une ou plusieurs clés de décryptage chargées par le concepteur, et comprend un décrypteur servant à décrypter un flux binaire de configuration crypté alors qu'il est chargé dans l'ULP. Cette dernière comprend également une logique servant à lire des informations d'en-tête indiquant si le flux binaire est crypté, et peut accepter des flux binaires cryptés et non cryptés. Les clés de cryptage peuvent être stockées dans une mémoire non volatile ou sauvegardées au moyen d'une batterie, de façon à être conservées lorsque l'alimentation est coupée.

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