Programmable signal processor architecture

Details Programmable signal processor architecture Programmable signal processor architecture

G - Physics

06

F

G06F 15/16 (2006.01) G06F 3/05 (2006.01) G06F 9/22 (2006.01) G06F 9/38 (2006.01) G06F 15/173 (2006.01)

Patent

CA 2084420

A programmable integrated signal processor("SPROC") is provided having a multiported central memory unit (RAM 100), a program memory (150), one or more digital processors (400) coupled to the RAM and to the program memory, a data flow manager (600) which controls external data flowing into the SPROC and processed data flowing out of the SPROC by acting as an interface of such data with the multiported RAM, input and output ports (700) coupled to the DFM and acting as serial interfaces for the SPROC, and a host port (800) permit- ting the programming of the SPROC and acting as a parallel in- terface to the SPROC, SPROCs may be coupled via their input and output ports to provide a system. The SPROC architecture in conjunction with a compiler and user interface system per- mits a user to "sketch and realize" complex circuits in the SPROC. An access port (900) permits reading and writing to data and program RAM memory locations. A probe (1000) per- mits monitoring of a memory location and provides an analog signal indicative thereof.

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