Programmable timing circuit for integrated circuit device...

Details Programmable timing circuit for integrated circuit device... Programmable timing circuit for integrated circuit device...

H - Electricity

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H01L 21/66 (2006.01) G01R 31/26 (2006.01) G01R 31/3185 (2006.01) G04F 1/00 (2006.01) H03K 7/08 (2006.01) H03M 1/82 (2006.01)

Patent

CA 2090654

Attorney Docket No. NS1786 PROGRAMMABLE TIMING CIRCUIT FOR INTEGRATED CIRCUIT DEVICE WITH TEST ACCESS PORT Abstract A programmable and controllable timing circuit (CTC) is formed on an integrated circuit chip (IC) having a test access port (TAP) with TAP access pins including a TAP data input (TDI) pin, a TAP data output (TDO) pin, a TAP mode select (TMS) pin, and a TAP clock (TCK) pin. The test access port includes a plurality of TAP data registers (TDRs) coupled to receive data signals at the TDI pin and to shift data signals to the TDO pin. A TAP instruction register (TIR) is coupled to receive instruction codes at the TDI pin and to direct use of selected TDRs. A TAP controller is coupled to receive control signals at the TMS pin and clock signals at the TCK pin and provide control and clock signals for controlling operation of the TIR and TDRs. The TAP is provided with a controllable timing circuit design specific TAP data register (CTC/DS/TDR) constructed for receiving a coded CTC digital timing code at the TDI pin. A variable timing generator circuit on the IC is responsive to a CTC digital timing code for generating a selected time interval between a start trigger signal (STS) and a clock strobe signal (STB) according to the specified CTC digital timing code. The CTC/DS/TDR is coupled to the variable timing generator circuit for specifying a selected time interval. In the preferred example the variable timing generator circuit is provided by a ramp generator (RAMP) initiating a voltage ramp signal (VRAMP) in response to an STS, a digital to analog converter (DAC) coupled to the CTC/DS/TDR for delivering an analog CTC voltage level signal (VCTC), and a comparator (COMP) coupled to receive and compare the voltage ramp signal (VRAMP) and CTC voltage signal (VCTC) and to deliver the clock strobe signal (STB).

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