Programmed implementation of real-time multiresolution...

Details Programmed implementation of real-time multiresolution... Programmed implementation of real-time multiresolution...

H - Electricity

04

N

354/138, 354/230

H04N 7/18 (2006.01) G06F 17/10 (2006.01) H04N 5/14 (2006.01)

Patent

CA 1254659

PROGRAMMED IMPLEMENTATION OF REAL-TIME MULTIRESOLUTION SIGNAL PROCESSING APPARATUS Abstract of the Disclosure Multiresolution processing apparatus may be programmed as pyramid processing apparatus. The apparatus comprises: a filter logic unit having of one or a plurality of identical interconnected programmable modules; a set of programmable multiplexers (MUX); a plurality of programmable random access-memories (RAM); and a timing and control means, which includes an instruction memory. The timing and control means programs: (a) the flow of information data through and (b) the operation of the filter logic unit, the set of MUX, and the plurality of RAM. The apparatus serves as a single stage to perform sequentially operations otherwise performed in respective, separate stages of an FSD or Burt Pyramid analyzer or of a pyramid synthesizer.

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