Pseudo-random bit sequence generator

Details Pseudo-random bit sequence generator Pseudo-random bit sequence generator

G - Physics

06

F

G06F 7/58 (2006.01) H03K 19/00 (2006.01)

Patent

CA 2664620

The present invention discloses a pseudo-random bit sequence (PRBS) generator which outputs the entire datapath, or entire pseudo-random bit sequence, over one single clock cycle. This is accomplished by removing redundancy, or any redundant exclusive-or gates from linear feedback shift registers; using logic to identify the critical path and optimal shift for the critical path; and dividing the datapath into several pipeline stages to increase the clock rate (i.e., transmission speed).

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