Pvdm (packet voice data module) generic bus protocol

G - Physics – 06 – F

Patent

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Details

G06F 13/38 (2006.01) G06F 13/42 (2006.01) H04L 29/02 (2006.01) H04L 29/06 (2006.01)

Patent

CA 2558360

A generic, parallel, n-bit wide data path communication bus allows a number of major slave devices (such as DSPs, Microprocessors, ASICs, FPGAs, etc) to be used with PVDMs and other devices. A higher level protocol allows a DMA engine to interface multiple Master devices directly with multiple slave modules through the DMA engine.

Un bus de communication générique, parallèle, à chemin de données large de n-bits, permet l'utilisation d'un certain nombre de dispositifs esclaves principaux (tels que DSP, microprocesseurs, ASIC, FPGA, etc.) avec des dispositifs PVDM et d'autres. Un protocole de plus haut niveau permet à un moteur DMA de créer une interface directe entre plusieurs dispositifs maîtres et plusieurs modules esclaves par l'intermédiaire du moteur DMA.

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