G - Physics – 06 – F
Patent
G - Physics
06
F
354/224
G06F 13/16 (2006.01) G06F 5/10 (2006.01) G06F 9/46 (2006.01) G06F 12/00 (2006.01)
Patent
CA 1237525
- 48 - QUEUE ADMINISTRATION METHOD AND APPARATUS Abstract: A memory subcontroller of a computer includes a queue for storing read and write requests issued by memory using units to a memory, apparatus for executing requests on the memory, and a circuit for administering the queue. When the queue is empty and the executing apparatus is ready to receive a request for execution, a request incoming from a using unit bypasses the queue: it is received by the executing apparatus directly and is not stored in the queue. Otherwise, the queue administration circuit stores the request in the queue and then awaits results of validity checks on the stored request. If the request is found to be invalid, generally the administration circuit discards the request from the queue by freeing the queue location or locations that store the invalid request to store the next received request. The invalid request is then overwritten by the next received request.
496553
American Telephone And Telegraph Company
Kirby Eades Gale Baker
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